Abstract: The world’s insatiable demand for computing is having a global impact. I will discuss two outstanding challenges in computing: the memory wall or communication wall, and computing’s carbon footprint. My approach to overcome these challenges leverages three-dimensional integrated circuits (3D ICs). I will present a 3D embedded DRAM to address the memory wall, and show how we model the carbon footprint of 3D ICs. I will also discuss 3D Electronic-Photonic ICs to address the communication wall.
![hills headshot](/sites/default/files/styles/content_width_mobile_min/public/media/images/2025/hills_512x512.png?itok=aQLXMdg-)
Bio: Gage Hills is a 4th year assistant professor in EE at Harvard. He finished his PhD at Stanford in 2018 and was a post-doc at MIT until 2021. He now leads the Nano-Design Research Group: https://nanodesign.seas.harvard.edu/. As a recent research highlight, the work he will describe in this talk was nominated for a Best Paper Award at the DATE 2025 conference.