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Great progress has taken place recently in demonstrating InGaAs MOSFETs for logic applications. Among possible InGaAs MOSFET architectures, the recessed-gate design is an attractive option due to its scalability and simplicity. This presentation will describe in detail a novel self-aligned recessed-gate fabrication process for scaled InGaAs Quantum-Well MOSFETs. The design emphasizes scalability, performance and manufacturability by making extensive use of dry etching and Si-compatible materials. The scaled device architecture achieved in this study has also enabled new device physics studies relevant for the application of InGaAs transistors for future logic.
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